1. Field of the Invention
The present invention relates to an apparatus and method for recovering data recorded on a storage medium or received by a communications system, and more particularly to an apparatus and method that divides a data channel into a plurality of data paths, wherein data from one of the data paths is selected based on a favorable error correcting code (ECC) syndrome, for example.
2. Description of the Related Art
Two aspects of data storage devices, such as magnetic and optical disk drives and tape drives, are under constant pressure for enhancement. One is the continuing effort to increase storage density and the other is the continuing effort to increase throughput by using higher speed components and improved techniques.
Storage density is improved by increasing the bit densities and by narrower, more closely spaced data tracks. These changes result in a reduction of the size of each bit which requires that the reading and writing capabilities be upgraded to higher levels of performance to maintain the same standard of reliability previously attained.
Among the characteristics that are designed to optimize drive performance during the read mode is delta-V, which is the voltage change per unit time threshold that is used to discriminate between data and noise signals on the channel. It has been common practice to set the delta-V value for optimum performance. However, the delta-V value that provides the best performance varies from transducer to transducer and, in a disk drive, also with the radial position of the transducer location which is a function of the speed of the head relative to the disk surface. To solve this problem, U.S. Pat. No. 4,821,125 discloses disk drive channel circuitry which uses variable values for delta-V that can be set on a head to head and track to track basis. Such channel circuitry uses only a single delta-V value at a time, however, and thus requires data to be re-read for each delta-V value when errors are encountered. This disadvantageously decreases throughput because the disk must be rotated into the transducer location so that data can be re-read from the disk.
Another characteristic that is designed to optimize drive performance during the read mode is the timing window in which a bit is read from a medium. It has been common practice to center the window for optimum performance using variable frequency oscillator (VFO) window centering circuitry. However, the position of the timing window that provides the best performance can vary due to bit shift, which is caused by, for example, different transducer/disk combinations and tolerances in the VFO window centering circuitry. To solve this problem, disk drive channel circuitry is known that uses a variable position timing window that can be shifted either early or late. U.S. Pat. No. 4,958,243 and "WINDOW-SHIFTING MECHANISM IN DATA SEPARATOR", IBM Technical Disclosure Bulletin, Vol. 30, No. 6, November 1987 disclose typical channel circuitry of this type. Such channel circuitry shifts the timing window for a whole data string, however, and thus requires data to be re-read for each desired shift of the timing window. This disadvantageously decreases throughput because the disk must be rotated into the transducer location so that data can be re-read from the disk.
Decreases in throughput are especially disruptive in multimedia applications where uninterrupted read data flow is of great significance. Decreased throughput in multimedia applications manifests itself in jerky visual motion or stopped scan updates in mid-screen while data is re-read.
U.S. Pat. No. 3,537,084 discloses a data storage timing system that compensates for bit shift driven by intersymbol interference, i.e., the first and last changes in a plurality of successive changes in the direction of magnetization will upon reading respectively result in an early-occurring and late-occurring data bit frame. The disclosed system uses one unique path for detection delay, one detection for framing data without any delay and another detection for framing the data with a delay equal to the anticipated intersymbol interference driven bit shift. Framing is strobed by a clock that is delayed a fraction of the anticipated intersymbol interference driven bit shift. The framing path is selected based on an inflexible set consecutive bit criteria, i.e., whether the bit that was read last corresponds to a change in the direction of magnetization or no change in the direction of magnetization. This system only compensates for intersymbol interference driven bit shift using the unique set consecutive bit criteria rules.
For a communications system, data that is incorrectly received and demodulated, can be re-transmitted by the communications system. However, this disadvantageously decreases the throughput of the communications system while the data is re-transmitted. This phenomenon is disruptive for modems, closed circuit cable systems and the like. This phenomenon is especially disruptive in multimedia applications where throughput is of great importance and manifests itself in jerky visual motion or stopped scan updates in mid-screen while data is re-transmitted.